feat(dmm): CMSIS core header and SVD entry for the DMM peripheral #44

Merged

hoogv merged 0 commits from refs/pull/44/head into dev

2026-07-22 17:51:09 +00:00

hoogv commented

2026-07-22 13:42:55 +00:00

(Migrated from codeberg.org)

Lands DMM (Data Modification Module) under the CMSIS register description epic (#4).

hal/registers/component/dmm.h now includes core_cr4f.h instead of a local qualifier redefinition.
A DMM SVD peripheral entry is added to hal/registers/svd/AWR6843AOP_MSS.svd, cross-checked via a new svd_check_dmm ctest.

No TI comparison test -- unlike every other peripheral landed so far, DMM has no TI CSL header in either available mmWave SDK install (confirmed genuinely absent, not just unindexed) and not even a base-address macro in sys_common_xwr68xx_mss.h. component/dmm.h's own top-of-file comment already documents this as a TRM-only transcription with no independent source to cross-check against.

Given the register count (24, several with a full 18-bit-per-source shared layout across DMMINTSET/CLR/LVL/FLG, plus 9 near-identical per-pin PC0-8 registers), the SVD entry was generated by a script parsing this project's own header macros -- same approach used for DMA (#37) -- spot-checked against the header/TRM afterward.

Found and fixed a real gap in tools/svd/check_svd.py itself: several of DMM's single-bit fields (e.g. DMMPC0's SYNCFUNC/CLKFUNC/ENAFUNC) only get a _Msk macro with a literal bit-shift, no companion _Pos macro at all -- this project's own macro-generation convention only emits _Pos for multi-bit fields, since a single-bit field's position is already fully expressed by its _Msk shift. The checker only recognized _Pos-declared fields, so it reported these as missing entirely. Fixed by also recognizing the _Msk-with-literal-shift pattern.

Verified locally:

Full suite builds, all 26 tests pass (7 svd_check_* + 19 ti_hal_comparison, unaffected).
Regression-tested the checker fix against every already-landed peripheral (ADCBUF, CBUFF, DSS_INTC, DSSREG, DMA, DMARAM) -- no behavior change for the existing _Pos-based path.
Sanity-checked the new single-bit-field path by injecting a wrong bitOffset into the SVD and confirming the checker catches it, then reverted.

Closes #11

Lands DMM (Data Modification Module) under the CMSIS register description epic (#4). - `hal/registers/component/dmm.h` now includes `core_cr4f.h` instead of a local qualifier redefinition. - A `DMM` SVD peripheral entry is added to `hal/registers/svd/AWR6843AOP_MSS.svd`, cross-checked via a new `svd_check_dmm` ctest. **No TI comparison test** -- unlike every other peripheral landed so far, DMM has no TI CSL header in either available mmWave SDK install (confirmed genuinely absent, not just unindexed) and not even a base-address macro in `sys_common_xwr68xx_mss.h`. `component/dmm.h`'s own top-of-file comment already documents this as a TRM-only transcription with no independent source to cross-check against. Given the register count (24, several with a full 18-bit-per-source shared layout across `DMMINTSET`/`CLR`/`LVL`/`FLG`, plus 9 near-identical per-pin `PC0-8` registers), the SVD entry was generated by a script parsing this project's own header macros -- same approach used for DMA (#37) -- spot-checked against the header/TRM afterward. **Found and fixed a real gap in `tools/svd/check_svd.py` itself**: several of DMM's single-bit fields (e.g. `DMMPC0`'s `SYNCFUNC`/`CLKFUNC`/`ENAFUNC`) only get a `_Msk` macro with a literal bit-shift, no companion `_Pos` macro at all -- this project's own macro-generation convention only emits `_Pos` for multi-bit fields, since a single-bit field's position is already fully expressed by its `_Msk` shift. The checker only recognized `_Pos`-declared fields, so it reported these as missing entirely. Fixed by also recognizing the `_Msk`-with-literal-shift pattern. Verified locally: - Full suite builds, all 26 tests pass (7 `svd_check_*` + 19 `ti_hal_comparison`, unaffected). - Regression-tested the checker fix against every already-landed peripheral (ADCBUF, CBUFF, DSS_INTC, DSSREG, DMA, DMARAM) -- no behavior change for the existing `_Pos`-based path. - Sanity-checked the new single-bit-field path by injecting a wrong `bitOffset` into the SVD and confirming the checker catches it, then reverted. Closes #11

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