feat(dmm): DMM driver implementation and host unit tests

hoogv commented

2026-07-23 15:10:23 +00:00

Owner

Description

Adds hal/mss/dmm/hal_dmm.c/.h — the DMM (Data Modification Module) driver: reset/known-state bring-up, Direct Data Mode circular-buffer configuration (DMMDDMDEST/DMMDDMBL, rejecting an unsupported blocksize or a busy module), enable/disable, and the four raw device handlers (DMM1_LVL0_IRQHandler/DMM1_LVL1_IRQHandler/DMM2_LVL0_IRQHandler/DMM2_LVL1_IRQHandler) decoding DMMOFF1/DMMOFF2 to a weak, application-overridable hal_dmm_irq_handler() hook. Both DMM instances supported (register-identical per TRM Chapter 20). Self-contained — no cross-module dependency.

Trace Mode is not implemented at all (only Direct Data Mode), and DMM pin functional-mode muxing (DMMPC0-8) is left entirely to the caller/board — documented in hal_dmm.h's top-of-file comment.

Why

Continues the driver-implementation phase started by GPIO (#75/#76), ESM (#77/#78), UART (#79/#80), I2C (#81/#82), SPI (#83/#84), ADCBUF (#85/#86), CBUFF (#87/#88), and HWA (#89/#90).

Closes #91

Type of Change

New feature

Impact Assessment

Functional impact: None — self-contained addition alongside the already-landed GPIO/ESM/UART/I2C/SPI/ADCBUF/CBUFF/HWA drivers.
Regulatory impact: None.
QMS impact: None.
Risk impact: No — existing risk coverage sufficient.

Testing

CI pipeline passes (compile, unit tests, integration tests, static analysis)
Manually tested: built and ran testing/mss/unit/hal_functionality/test_dmm locally (20 test cases, 92 assertions, all passing) alongside the full existing ctest suite (279/279 passing, no regressions); ran a full MISRA C:2025 pass (0 unsuppressed findings, -DENABLE_DMM_MODULE added); reformatted and re-verified against the exact clang-format 18.1.3 the CI runner uses; sanity-checked by changing the 1024-byte DMMDDMBL blocksize encoding from 0x6 to 0x7, confirming the test suite fails (2 test cases, 2 assertions), then reverting.
No regressions observed in related areas

PR Size

XL (> 300 lines) — must split unless exemption declared

Size justification / exemption (if L or XL):

790 raw lines across 9 files, all hand-reviewed (no mechanically-generated content). Not split further — the driver (hal_dmm.c/.h, 473 lines) and its comprehensive Catch2 spec (test_dmm.c, 300 lines, covering both instances, the busy-rejection path, the blocksize-encoding validation, and all four IRQ handlers) don't decompose into independently-reviewable sub-PRs, same rationale as prior driver PRs (#78, #80, #82, #84, #86, #88, #90). The remaining files are small CMake/Kconfig/MISRA wiring diffs, also not independently reviewable apart from the driver they enable.

Checklist

Commit messages follow type(scope): description convention with Relates to #<issue> footer
PR template filled in completely
No unverified external binaries introduced (see QMS-GITFLOW-001 Binary Security section)
All commits leave the codebase in a compilable, passing-tests state (Commit Integrity Rule)

Summary

hal/mss/dmm/hal_dmm.c/.h: DMM driver (reset/bring-up, Direct Data Mode config, enable/disable, IRQ handlers) — Trace Mode out of scope, documented in the header's top-of-file comment
testing/mss/unit/hal_functionality/test_dmm.c (+ CMakeLists.txt): Catch2 functional test suite. No naming collision — no ti_hal_comparison/test_dmm.c exists (DMM has no TI CSL header to cross-check against at all).
zephyr/Kconfig / zephyr/CMakeLists.txt / hal/util/hal_config_mss.h: HAL_AWR6843_DMM Kconfig option and ENABLE_DMM_MODULE bridge, same pattern as every other landed driver
tools/misra/run_misra.sh: -DENABLE_DMM_MODULE added

## Description Adds `hal/mss/dmm/hal_dmm.c`/`.h` — the DMM (Data Modification Module) driver: reset/known-state bring-up, Direct Data Mode circular-buffer configuration (`DMMDDMDEST`/`DMMDDMBL`, rejecting an unsupported blocksize or a busy module), enable/disable, and the four raw device handlers (`DMM1_LVL0_IRQHandler`/`DMM1_LVL1_IRQHandler`/`DMM2_LVL0_IRQHandler`/`DMM2_LVL1_IRQHandler`) decoding `DMMOFF1`/`DMMOFF2` to a weak, application-overridable `hal_dmm_irq_handler()` hook. Both DMM instances supported (register-identical per TRM Chapter 20). Self-contained — no cross-module dependency. Trace Mode is not implemented at all (only Direct Data Mode), and DMM pin functional-mode muxing (`DMMPC0-8`) is left entirely to the caller/board — documented in `hal_dmm.h`'s top-of-file comment. ## Why Continues the driver-implementation phase started by GPIO (#75/#76), ESM (#77/#78), UART (#79/#80), I2C (#81/#82), SPI (#83/#84), ADCBUF (#85/#86), CBUFF (#87/#88), and HWA (#89/#90). ## Related Issue Closes #91 ## Type of Change - [x] New feature ## Impact Assessment - **Functional impact:** None — self-contained addition alongside the already-landed GPIO/ESM/UART/I2C/SPI/ADCBUF/CBUFF/HWA drivers. - **Regulatory impact:** None. - **QMS impact:** None. - **Risk impact:** No — existing risk coverage sufficient. ## Testing - [x] CI pipeline passes (compile, unit tests, integration tests, static analysis) - [x] Manually tested: built and ran `testing/mss/unit/hal_functionality/test_dmm` locally (20 test cases, 92 assertions, all passing) alongside the full existing `ctest` suite (279/279 passing, no regressions); ran a full MISRA C:2025 pass (0 unsuppressed findings, `-DENABLE_DMM_MODULE` added); reformatted and re-verified against the exact clang-format 18.1.3 the CI runner uses; sanity-checked by changing the 1024-byte `DMMDDMBL` blocksize encoding from `0x6` to `0x7`, confirming the test suite fails (2 test cases, 2 assertions), then reverting. - [x] No regressions observed in related areas ## PR Size - [x] XL (> 300 lines) — must split unless exemption declared **Size justification / exemption (if L or XL):** 790 raw lines across 9 files, all hand-reviewed (no mechanically-generated content). Not split further — the driver (`hal_dmm.c`/`.h`, 473 lines) and its comprehensive Catch2 spec (`test_dmm.c`, 300 lines, covering both instances, the busy-rejection path, the blocksize-encoding validation, and all four IRQ handlers) don't decompose into independently-reviewable sub-PRs, same rationale as prior driver PRs (#78, #80, #82, #84, #86, #88, #90). The remaining files are small CMake/Kconfig/MISRA wiring diffs, also not independently reviewable apart from the driver they enable. ## Checklist - [x] Commit messages follow `type(scope): description` convention with `Relates to #<issue>` footer - [x] PR template filled in completely - [x] No unverified external binaries introduced (see QMS-GITFLOW-001 Binary Security section) - [x] All commits leave the codebase in a compilable, passing-tests state (Commit Integrity Rule) ## Summary - `hal/mss/dmm/hal_dmm.c`/`.h`: DMM driver (reset/bring-up, Direct Data Mode config, enable/disable, IRQ handlers) — Trace Mode out of scope, documented in the header's top-of-file comment - `testing/mss/unit/hal_functionality/test_dmm.c` (+ `CMakeLists.txt`): Catch2 functional test suite. No naming collision — no `ti_hal_comparison/test_dmm.c` exists (DMM has no TI CSL header to cross-check against at all). - `zephyr/Kconfig` / `zephyr/CMakeLists.txt` / `hal/util/hal_config_mss.h`: `HAL_AWR6843_DMM` Kconfig option and `ENABLE_DMM_MODULE` bridge, same pattern as every other landed driver - `tools/misra/run_misra.sh`: `-DENABLE_DMM_MODULE` added

hoogv added 1 commit

2026-07-23 15:10:23 +00:00

feat(dmm): DMM driver implementation and host unit tests

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33675948ae

Adds hal/mss/dmm/hal_dmm.c/.h - reset/known-state bring-up, Direct
Data Mode circular-buffer configuration with busy/blocksize
validation, enable/disable, and the four raw device handlers
(DMM1/DMM2 x Level0/Level1) decoding DMMOFF1/DMMOFF2 to a weak
hal_dmm_irq_handler() hook. Trace Mode is not implemented - Direct
Data Mode only, see hal_dmm.h's top-of-file comment.

Relates to #4, relates to #91

hoogv merged commit 33675948ae into dev

2026-07-23 15:11:02 +00:00

hoogv added this to the Revision V1.0 Launch milestone

2026-07-23 15:11:09 +00:00

hoogv added this to the Development project

2026-07-23 15:11:13 +00:00

hoogv referenced this pull request

2026-07-23 15:21:47 +00:00

feat(epwm): EPWM driver implementation and host unit tests #94

hoogv referenced this pull request

2026-07-23 15:30:43 +00:00

feat(soc): SOC driver implementation and host unit tests #96