feat: DMM driver implementation and host unit tests #91

New issue

Closed

opened 2026-07-23 15:03:38 +00:00 by hoogv · 0 comments

hoogv commented

2026-07-23 15:03:38 +00:00

Owner

Description

Adds hal/mss/dmm/hal_dmm.c/.h — the DMM (Data Modification Module) driver: reset/known-state bring-up (pulses GLBCTRL.RESET, leaves ONOFF at the TRM-recommended "off" encoding), Direct Data Mode circular-buffer configuration (DMMDDMDEST/DMMDDMBL, rejecting an unsupported blocksize or a busy module), enable/disable, and the four raw device handlers (DMM1_LVL0_IRQHandler/DMM1_LVL1_IRQHandler/DMM2_LVL0_IRQHandler/DMM2_LVL1_IRQHandler) decoding DMMOFF1/DMMOFF2 to a weak, application-overridable hal_dmm_irq_handler() hook. Both DMM instances supported (register-identical per TRM Chapter 20).

Deliberately minimal scope (documented in hal_dmm.h's top-of-file comment): Trace Mode is not implemented at all (only Direct Data Mode), and DMM pin functional-mode muxing (DMMPC0-8) is left entirely to the caller/board.

Use Case / Rationale

As a firmware developer, I need a hal_dmm_* API for basic DMM bring-up and Direct Data Mode buffer configuration, following the same driver pattern established by GPIO, ESM, UART, I2C, SPI, ADCBUF, CBUFF, and HWA.

As a QMS reviewer, I need a host-native Catch2 test suite (testing/mss/unit/hal_functionality/test_dmm.c) covering both instances, the busy-rejection path, the blocksize-encoding validation, and all four IRQ handlers, runnable in CI without target hardware.

Acceptance Criteria

hal/mss/dmm/hal_dmm.c/.h implemented against this project's current hal/registers/component/dmm.h/instance/dmm.h
testing/mss/unit/hal_functionality/test_dmm.c passes under ctest
Sanity-checked by deliberately breaking a register field/formula and confirming the test suite catches it, then reverting

Functional Impact

None — self-contained addition alongside the already-landed GPIO/ESM/UART/I2C/SPI/ADCBUF/CBUFF/HWA drivers.

Regulatory Impact

None

QMS Impact

None

Risk Impact

No — existing risk coverage sufficient.

Relates to #4, relates to #75, relates to #77, relates to #79, relates to #81, relates to #83, relates to #85, relates to #87, relates to #89

### Description Adds `hal/mss/dmm/hal_dmm.c`/`.h` — the DMM (Data Modification Module) driver: reset/known-state bring-up (pulses `GLBCTRL.RESET`, leaves `ONOFF` at the TRM-recommended "off" encoding), Direct Data Mode circular-buffer configuration (`DMMDDMDEST`/`DMMDDMBL`, rejecting an unsupported blocksize or a busy module), enable/disable, and the four raw device handlers (`DMM1_LVL0_IRQHandler`/`DMM1_LVL1_IRQHandler`/`DMM2_LVL0_IRQHandler`/`DMM2_LVL1_IRQHandler`) decoding `DMMOFF1`/`DMMOFF2` to a weak, application-overridable `hal_dmm_irq_handler()` hook. Both DMM instances supported (register-identical per TRM Chapter 20). Deliberately minimal scope (documented in `hal_dmm.h`'s top-of-file comment): Trace Mode is not implemented at all (only Direct Data Mode), and DMM pin functional-mode muxing (`DMMPC0-8`) is left entirely to the caller/board. ### Use Case / Rationale As a firmware developer, I need a `hal_dmm_*` API for basic DMM bring-up and Direct Data Mode buffer configuration, following the same driver pattern established by GPIO, ESM, UART, I2C, SPI, ADCBUF, CBUFF, and HWA. As a QMS reviewer, I need a host-native Catch2 test suite (`testing/mss/unit/hal_functionality/test_dmm.c`) covering both instances, the busy-rejection path, the blocksize-encoding validation, and all four IRQ handlers, runnable in CI without target hardware. ### Acceptance Criteria - [x] `hal/mss/dmm/hal_dmm.c`/`.h` implemented against this project's current `hal/registers/component/dmm.h`/`instance/dmm.h` - [x] `testing/mss/unit/hal_functionality/test_dmm.c` passes under `ctest` - [x] Sanity-checked by deliberately breaking a register field/formula and confirming the test suite catches it, then reverting ### Functional Impact None — self-contained addition alongside the already-landed GPIO/ESM/UART/I2C/SPI/ADCBUF/CBUFF/HWA drivers. ### Regulatory Impact None ### QMS Impact None ### Risk Impact No — existing risk coverage sufficient. ### Related Issues / PRs Relates to #4, relates to #75, relates to #77, relates to #79, relates to #81, relates to #83, relates to #85, relates to #87, relates to #89

hoogv added this to the Revision V1.0 Launch milestone

2026-07-23 15:03:49 +00:00

hoogv added this to the Development project

2026-07-23 15:03:50 +00:00

hoogv self-assigned this

2026-07-23 15:03:51 +00:00

hoogv referenced this issue from a commit

2026-07-23 15:09:55 +00:00

feat(dmm): DMM driver implementation and host unit tests

hoogv referenced this issue from a pull request that will close it,

2026-07-23 15:10:23 +00:00

feat(dmm): DMM driver implementation and host unit tests #92