fix(pinmux): write PADCFG fields separately instead of combined #123

Merged

hoogv merged 1 commit from fix/122-pinmux-field-writes into dev

2026-07-23 22:47:40 +00:00

hoogv commented

2026-07-23 22:47:32 +00:00

Owner

Closes #122.

hal_pinmux_set_pin_function()'s single combined write to PADxx_CFG_REG computes the correct final value but empirically doesn't reach the pad on real hardware. Switching to five separate direct field writes (matching the hardware-confirmed reference driver, Universal_hal's pinmux_iwr68xx.c) fixed it -- confirmed via a controlled bisection on real AWR6843AOP hardware (same MPU config, same GPIO driver, only this function swapped between the two write styles).

Local verification:

ctest: 403/403 passing (clean full rebuild)
MISRA (tools/misra/run_misra.sh): 0 findings
clang-format --dry-run --Werror: clean

PR_Size/S

Closes #122. `hal_pinmux_set_pin_function()`'s single combined write to `PADxx_CFG_REG` computes the correct final value but empirically doesn't reach the pad on real hardware. Switching to five separate direct field writes (matching the hardware-confirmed reference driver, `Universal_hal`'s `pinmux_iwr68xx.c`) fixed it -- confirmed via a controlled bisection on real AWR6843AOP hardware (same MPU config, same GPIO driver, only this function swapped between the two write styles). Local verification: - `ctest`: 403/403 passing (clean full rebuild) - MISRA (`tools/misra/run_misra.sh`): 0 findings - `clang-format --dry-run --Werror`: clean PR_Size/S

hoogv added 1 commit

2026-07-23 22:47:32 +00:00

fix(pinmux): write PADCFG fields separately instead of combined

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e5b0d2fd3f

hal_pinmux_set_pin_function() computed the target PADxx_CFG_REG value
and wrote it in one combined store -- logically equivalent to the
reference driver, same final value, but the pad never actually
reached its requested function on real hardware.

The reference driver (Universal_hal's pinmux_iwr68xx.c, hardware-
confirmed) does five separate sequential field writes instead. Switching
to that exact pattern fixed it, confirmed via a controlled bisection on
real AWR6843AOP hardware.

No documented reason is available for why this register needs
field-at-a-time writes; carried forward as empirically confirmed, same
as this driver's other undocumented specifics.

Fixes #122

hoogv merged commit e5b0d2fd3f into dev

2026-07-23 22:47:40 +00:00

hoogv deleted branch fix/122-pinmux-field-writes

2026-07-23 22:47:40 +00:00

hoogv added this to the Revision V1.0 Launch milestone

2026-07-23 22:47:42 +00:00

hoogv added this to the Development project

2026-07-23 22:47:45 +00:00

hoogv self-assigned this

2026-07-23 22:47:46 +00:00

hoogv referenced this pull request

2026-07-23 23:15:37 +00:00