feat(hwa): HWA driver implementation and host unit tests

hoogv commented

2026-07-23 14:31:59 +00:00

Owner

Description

Adds hal/mss/hwa/hal_hwa.c/.h — the HWA (Hardware Accelerator) driver: reset/clock-gate bring-up (matching TI's own hwa.c reference sequence), raw param-set-entry load (verbatim blob write, no structured field API), single-contiguous-range software trigger, and a poll-only completion check. No interrupt path — no MSS-reachable HWA completion IRQ exists (documented in hal_hwa.h's top-of-file comment). Self-contained — no cross-module dependency.

Why

Continues the driver-implementation phase started by GPIO (#75/#76), ESM (#77/#78), UART (#79/#80), I2C (#81/#82), SPI (#83/#84), ADCBUF (#85/#86), and CBUFF (#87/#88).

Closes #89

Type of Change

New feature

Impact Assessment

Functional impact: None — self-contained addition alongside the already-landed GPIO/ESM/UART/I2C/SPI/ADCBUF/CBUFF drivers.
Regulatory impact: None.
QMS impact: None.
Risk impact: No — existing risk coverage sufficient.

Testing

CI pipeline passes (compile, unit tests, integration tests, static analysis)
Manually tested: built and ran testing/mss/unit/hal_functionality/test_hwa_functional locally (10 test cases, 77 assertions, all passing) alongside the full existing ctest suite (259/259 passing, no regressions); ran a full MISRA C:2025 pass (0 unsuppressed findings, -DENABLE_HWA_MODULE added); reformatted and re-verified against the exact clang-format 18.1.3 the CI runner uses; sanity-checked by dropping the + 1U from hwa_range_mask()'s count computation, confirming the test suite fails (3 test cases, 4 assertions), then reverting.
No regressions observed in related areas

PR Size

XL (> 300 lines) — must split unless exemption declared

Size justification / exemption (if L or XL):

620 raw lines across 9 files, all hand-reviewed (no mechanically-generated content). Not split further — the driver (hal_hwa.c/.h, 373 lines) and its Catch2 spec (test_hwa.c, 231 lines, covering the reset/bring-up sequence, param-set load bounds checking, trigger range validation, and the done-poll/clear-on-completion logic) don't decompose into independently-reviewable sub-PRs, same rationale as prior driver PRs (#78, #80, #82, #84, #86, #88). The remaining files are small CMake/Kconfig/MISRA wiring diffs, also not independently reviewable apart from the driver they enable.

Checklist

Commit messages follow type(scope): description convention with Relates to #<issue> footer
PR template filled in completely
No unverified external binaries introduced (see QMS-GITFLOW-001 Binary Security section)
All commits leave the codebase in a compilable, passing-tests state (Commit Integrity Rule)

Summary

hal/mss/hwa/hal_hwa.c/.h: HWA driver (reset/bring-up, param-set load, single-range trigger, poll-only done check) — deliberately minimal scope, documented in the header's top-of-file comment
testing/mss/unit/hal_functionality/test_hwa.c (+ CMakeLists.txt): Catch2 functional test suite. Named test_hwa_functional (not test_hwa) to avoid a CMake target-name collision with ti_hal_comparison/test_hwa.c's register-layout comparison test.
zephyr/Kconfig / zephyr/CMakeLists.txt / hal/util/hal_config_mss.h: HAL_AWR6843_HWA Kconfig option and ENABLE_HWA_MODULE bridge, same pattern as every other landed driver
tools/misra/run_misra.sh: -DENABLE_HWA_MODULE added

## Description Adds `hal/mss/hwa/hal_hwa.c`/`.h` — the HWA (Hardware Accelerator) driver: reset/clock-gate bring-up (matching TI's own `hwa.c` reference sequence), raw param-set-entry load (verbatim blob write, no structured field API), single-contiguous-range software trigger, and a poll-only completion check. No interrupt path — no MSS-reachable HWA completion IRQ exists (documented in `hal_hwa.h`'s top-of-file comment). Self-contained — no cross-module dependency. ## Why Continues the driver-implementation phase started by GPIO (#75/#76), ESM (#77/#78), UART (#79/#80), I2C (#81/#82), SPI (#83/#84), ADCBUF (#85/#86), and CBUFF (#87/#88). ## Related Issue Closes #89 ## Type of Change - [x] New feature ## Impact Assessment - **Functional impact:** None — self-contained addition alongside the already-landed GPIO/ESM/UART/I2C/SPI/ADCBUF/CBUFF drivers. - **Regulatory impact:** None. - **QMS impact:** None. - **Risk impact:** No — existing risk coverage sufficient. ## Testing - [x] CI pipeline passes (compile, unit tests, integration tests, static analysis) - [x] Manually tested: built and ran `testing/mss/unit/hal_functionality/test_hwa_functional` locally (10 test cases, 77 assertions, all passing) alongside the full existing `ctest` suite (259/259 passing, no regressions); ran a full MISRA C:2025 pass (0 unsuppressed findings, `-DENABLE_HWA_MODULE` added); reformatted and re-verified against the exact clang-format 18.1.3 the CI runner uses; sanity-checked by dropping the `+ 1U` from `hwa_range_mask()`'s count computation, confirming the test suite fails (3 test cases, 4 assertions), then reverting. - [x] No regressions observed in related areas ## PR Size - [x] XL (> 300 lines) — must split unless exemption declared **Size justification / exemption (if L or XL):** 620 raw lines across 9 files, all hand-reviewed (no mechanically-generated content). Not split further — the driver (`hal_hwa.c`/`.h`, 373 lines) and its Catch2 spec (`test_hwa.c`, 231 lines, covering the reset/bring-up sequence, param-set load bounds checking, trigger range validation, and the done-poll/clear-on-completion logic) don't decompose into independently-reviewable sub-PRs, same rationale as prior driver PRs (#78, #80, #82, #84, #86, #88). The remaining files are small CMake/Kconfig/MISRA wiring diffs, also not independently reviewable apart from the driver they enable. ## Checklist - [x] Commit messages follow `type(scope): description` convention with `Relates to #<issue>` footer - [x] PR template filled in completely - [x] No unverified external binaries introduced (see QMS-GITFLOW-001 Binary Security section) - [x] All commits leave the codebase in a compilable, passing-tests state (Commit Integrity Rule) ## Summary - `hal/mss/hwa/hal_hwa.c`/`.h`: HWA driver (reset/bring-up, param-set load, single-range trigger, poll-only done check) — deliberately minimal scope, documented in the header's top-of-file comment - `testing/mss/unit/hal_functionality/test_hwa.c` (+ `CMakeLists.txt`): Catch2 functional test suite. Named `test_hwa_functional` (not `test_hwa`) to avoid a CMake target-name collision with `ti_hal_comparison/test_hwa.c`'s register-layout comparison test. - `zephyr/Kconfig` / `zephyr/CMakeLists.txt` / `hal/util/hal_config_mss.h`: `HAL_AWR6843_HWA` Kconfig option and `ENABLE_HWA_MODULE` bridge, same pattern as every other landed driver - `tools/misra/run_misra.sh`: `-DENABLE_HWA_MODULE` added

hoogv added 1 commit

2026-07-23 14:31:59 +00:00

feat(hwa): HWA driver implementation and host unit tests

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1c6887798a

Adds hal/mss/hwa/hal_hwa.c/.h - reset/clock-gate bring-up matching
TI's own hwa.c reference sequence, raw param-set-entry load (no
structured field API - see rationale in hal_hwa.h), single-contiguous-
range software trigger, and a poll-only completion check. No interrupt
path - no MSS-reachable HWA completion IRQ exists.

Relates to #4, relates to #89

hoogv merged commit 1c6887798a into dev

2026-07-23 15:02:49 +00:00

hoogv added this to the Development project

2026-07-23 15:03:03 +00:00

hoogv self-assigned this

2026-07-23 15:03:04 +00:00

hoogv added this to the Revision V1.0 Launch milestone

2026-07-23 15:03:06 +00:00

hoogv referenced this pull request

2026-07-23 15:10:23 +00:00

feat(dmm): DMM driver implementation and host unit tests #92

hoogv referenced this pull request