feat: EDMA driver implementation and host unit tests #101

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opened 2026-07-23 18:11:00 +00:00 by hoogv · 0 comments

hoogv commented

2026-07-23 18:11:00 +00:00

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Description

Adds hal/dss/edma/hal_edma.c/.h — the EDMA (TPCC/TPTC) driver: bring-up (clears latched error status on the selected TPCC and its two owned TPTCs — no software-visible reset control exists for this block), hal_edma_configure_transfer() (fills one PaRAM entry for a basic, non-linked, non-chained AB-Sync one-shot transfer, arming the completion interrupt for that channel), hal_edma_trigger_manual()/hal_edma_channel_enable()/hal_edma_channel_disable() (write-1-to-set/clear strobes against ESR/EESR/EECR), and the six raw device handlers (EDMA_TPCC0_DONE_IRQHandler/EDMA_TPCC0_ERROR_IRQHandler/EDMA_TPTC0_DONE_IRQHandler/EDMA_TPTC0_ERROR_IRQHandler/EDMA_TPTC1_DONE_IRQHandler/EDMA_TPTC1_ERROR_IRQHandler) decoding/clearing status to a weak, application-overridable hal_edma_irq_handler() hook. Both independent TPCC instances (TPCC0 owning TPTC0/TPTC1, TPCC1 owning TPTC2/TPTC3) supported, though only TPCC0's VIM channels exist (TPCC1/TPTC2/TPTC3 route via the DSS/C674x's own interrupt controller, outside this MSS-side HAL's scope).

Deliberately minimal one-shot-transfer scope (documented in hal_edma.h's top-of-file comment): no QDMA, no chained/linked transfers, no manual-mode/A-Sync edge cases beyond basic AB-Sync, no per-shadow-region interrupt-enable shadowing.

Use Case / Rationale

As a firmware developer, I need a hal_edma_* API for basic one-shot DMA transfers, continuing the DSS-side driver batch started by Mailbox (#99/#100) — this driver is landed second since it has no dependency on Mailbox, but both are needed before hal_vim.c's dispatch table (already merged) can be fully exercised end-to-end.

As a QMS reviewer, I need a host-native Catch2 test suite (testing/dss/edma/test_edma.c) covering both TPCC instances, PaRAM entry configuration, channel enable/disable/trigger bounds checking, and all six IRQ handlers, runnable in CI without target hardware.

Acceptance Criteria

hal/dss/edma/hal_edma.c/.h implemented against this project's current hal/registers/component/edma.h/instance/edma.h
testing/dss/edma/test_edma.c passes under ctest
Sanity-checked by deliberately breaking a register field/formula and confirming the test suite catches it, then reverting

Functional Impact

None — self-contained addition alongside the already-landed Mailbox driver.

Regulatory Impact

None

QMS Impact

None

Risk Impact

No — existing risk coverage sufficient.

Relates to #4, relates to #99

### Description Adds `hal/dss/edma/hal_edma.c`/`.h` — the EDMA (TPCC/TPTC) driver: bring-up (clears latched error status on the selected TPCC and its two owned TPTCs — no software-visible reset control exists for this block), `hal_edma_configure_transfer()` (fills one PaRAM entry for a basic, non-linked, non-chained AB-Sync one-shot transfer, arming the completion interrupt for that channel), `hal_edma_trigger_manual()`/`hal_edma_channel_enable()`/`hal_edma_channel_disable()` (write-1-to-set/clear strobes against ESR/EESR/EECR), and the six raw device handlers (`EDMA_TPCC0_DONE_IRQHandler`/`EDMA_TPCC0_ERROR_IRQHandler`/`EDMA_TPTC0_DONE_IRQHandler`/`EDMA_TPTC0_ERROR_IRQHandler`/`EDMA_TPTC1_DONE_IRQHandler`/`EDMA_TPTC1_ERROR_IRQHandler`) decoding/clearing status to a weak, application-overridable `hal_edma_irq_handler()` hook. Both independent TPCC instances (TPCC0 owning TPTC0/TPTC1, TPCC1 owning TPTC2/TPTC3) supported, though only TPCC0's VIM channels exist (TPCC1/TPTC2/TPTC3 route via the DSS/C674x's own interrupt controller, outside this MSS-side HAL's scope). Deliberately minimal one-shot-transfer scope (documented in `hal_edma.h`'s top-of-file comment): no QDMA, no chained/linked transfers, no manual-mode/A-Sync edge cases beyond basic AB-Sync, no per-shadow-region interrupt-enable shadowing. ### Use Case / Rationale As a firmware developer, I need a `hal_edma_*` API for basic one-shot DMA transfers, continuing the DSS-side driver batch started by Mailbox (#99/#100) — this driver is landed second since it has no dependency on Mailbox, but both are needed before `hal_vim.c`'s dispatch table (already merged) can be fully exercised end-to-end. As a QMS reviewer, I need a host-native Catch2 test suite (`testing/dss/edma/test_edma.c`) covering both TPCC instances, PaRAM entry configuration, channel enable/disable/trigger bounds checking, and all six IRQ handlers, runnable in CI without target hardware. ### Acceptance Criteria - [ ] `hal/dss/edma/hal_edma.c`/`.h` implemented against this project's current `hal/registers/component/edma.h`/`instance/edma.h` - [ ] `testing/dss/edma/test_edma.c` passes under `ctest` - [ ] Sanity-checked by deliberately breaking a register field/formula and confirming the test suite catches it, then reverting ### Functional Impact None — self-contained addition alongside the already-landed Mailbox driver. ### Regulatory Impact None ### QMS Impact None ### Risk Impact No — existing risk coverage sufficient. ### Related Issues / PRs Relates to #4, relates to #99

hoogv referenced this issue from a commit

2026-07-23 18:16:12 +00:00

feat(edma): EDMA driver implementation and host unit tests

hoogv referenced this issue from a pull request that will close it,

2026-07-23 18:16:35 +00:00

feat(edma): EDMA driver implementation and host unit tests #102

hoogv closed this issue

2026-07-23 18:17:00 +00:00

hoogv referenced this issue

2026-07-23 18:20:49 +00:00

feat: VIM driver implementation and host unit tests #103

hoogv referenced this issue from a commit