feat(esm): ESM driver implementation and host unit tests #78

Merged

hoogv merged 0 commits from feat/77-esm-driver into dev

2026-07-23 09:37:48 +00:00

hoogv commented

2026-07-23 09:37:03 +00:00

(Migrated from codeberg.org)

Description

Adds hal/mss/esm/hal_esm.c/.h (+ private/esm_types.h) — the ESM driver: pending-error clear on init, routing ESM's high/low priority lines through the VIM, per-channel Group 1 IRQ enable/disable via ESMIESR/ESMIECR, and the two priority IRQ handlers decoding ESMIOFFHR/ESMIOFFLR to a weak, application-overridable hal_esm_irq_handler() hook. Also lands hal/mss/vim/hal_vim.h (declarations only — hal_vim.c is a separate future issue) since hal_esm_init() calls hal_vim_set_priority()/hal_vim_enable().

Why

Continues the driver-implementation phase started by GPIO (#75/#76). ESM is on-by-default safety/error-signaling infrastructure most other peripherals eventually route errors through, so landing it early (with VIM's header-only dependency) keeps later drivers unblocked.

Closes #77

Type of Change

New feature

Impact Assessment

Functional impact: None — self-contained addition alongside the already-landed GPIO driver.
Regulatory impact: None.
QMS impact: None.
Risk impact: No — existing risk coverage sufficient.

Testing

CI pipeline passes (compile, unit tests, integration tests, static analysis)
Manually tested: built and ran testing/mss/unit/hal_functionality/test_esm_functional locally (15 test cases, 90 assertions, all passing) alongside the full existing ctest suite (165/165 passing, no regressions); ran a full MISRA C:2025 pass (0 unsuppressed findings, no new -D flag needed since ESM is on-by-default via DISABLE_ESM_MODULE); sanity-checked by shifting hal_esm_enable_irq()'s ESMIESR1 write by one bit, confirming the test suite fails, then reverting.
No regressions observed in related areas

PR Size

XL (> 300 lines) — justification required below

Size justification / exemption (if L or XL):

949 raw lines across 6 files, all genuinely hand-reviewed (no mechanically-generated umbrella content this time, unlike GPIO's PR). Not split further because the three pieces don't decompose into independently-reviewable sub-PRs: the driver (hal_esm.c/.h, 329 lines) is meaningless without its comprehensive Catch2 spec (test_esm.c, 315 lines, covering both IRQ handlers' channel-decode logic plus the VIM-routing calls via FFF fakes), and both need hal_vim.h's declarations (141 lines) to even compile, since hal_esm_init() calls two of its functions. esm_types.h's 155-line channel table is TI-cross-checked data, not hand-composed logic.

Checklist

Commit messages follow type(scope): description convention with Relates to #<issue> footer
PR template filled in completely
No unverified external binaries introduced (see QMS-GITFLOW-001 Binary Security section)
All commits leave the codebase in a compilable, passing-tests state (Commit Integrity Rule)

Summary

hal/mss/esm/hal_esm.c/.h: ESM driver (init/VIM routing, IRQ enable/disable, priority IRQ handlers)
hal/mss/esm/private/esm_types.h: ESM channel enum, cross-checked against TI's sys_common_xwr68xx_mss.h — found and fixed two genuine omissions: channels 21 (MCANB_RAM_FATAL_ERR) and 33 (MCANB_RAM_REPAIR_ERR) were misclassified as unassigned gaps in the prior draft and are real assigned sources in TI's table
hal/mss/vim/hal_vim.h: VIM driver header (declarations only, no implementation yet)
testing/mss/unit/hal_functionality/test_esm.c (+ CMakeLists.txt): Catch2 functional test suite, using FFF fakes for the two VIM calls

## Description Adds `hal/mss/esm/hal_esm.c`/`.h` (+ `private/esm_types.h`) — the ESM driver: pending-error clear on init, routing ESM's high/low priority lines through the VIM, per-channel Group 1 IRQ enable/disable via `ESMIESR`/`ESMIECR`, and the two priority IRQ handlers decoding `ESMIOFFHR`/`ESMIOFFLR` to a weak, application-overridable `hal_esm_irq_handler()` hook. Also lands `hal/mss/vim/hal_vim.h` (declarations only — `hal_vim.c` is a separate future issue) since `hal_esm_init()` calls `hal_vim_set_priority()`/`hal_vim_enable()`. ## Why Continues the driver-implementation phase started by GPIO (#75/#76). ESM is on-by-default safety/error-signaling infrastructure most other peripherals eventually route errors through, so landing it early (with VIM's header-only dependency) keeps later drivers unblocked. ## Related Issue Closes #77 ## Type of Change - [x] New feature ## Impact Assessment - **Functional impact:** None — self-contained addition alongside the already-landed GPIO driver. - **Regulatory impact:** None. - **QMS impact:** None. - **Risk impact:** No — existing risk coverage sufficient. ## Testing - [x] CI pipeline passes (compile, unit tests, integration tests, static analysis) - [x] Manually tested: built and ran `testing/mss/unit/hal_functionality/test_esm_functional` locally (15 test cases, 90 assertions, all passing) alongside the full existing `ctest` suite (165/165 passing, no regressions); ran a full MISRA C:2025 pass (0 unsuppressed findings, no new `-D` flag needed since ESM is on-by-default via `DISABLE_ESM_MODULE`); sanity-checked by shifting `hal_esm_enable_irq()`'s `ESMIESR1` write by one bit, confirming the test suite fails, then reverting. - [x] No regressions observed in related areas ## PR Size - [x] XL (> 300 lines) — justification required below **Size justification / exemption (if L or XL):** 949 raw lines across 6 files, all genuinely hand-reviewed (no mechanically-generated umbrella content this time, unlike GPIO's PR). Not split further because the three pieces don't decompose into independently-reviewable sub-PRs: the driver (`hal_esm.c`/`.h`, 329 lines) is meaningless without its comprehensive Catch2 spec (`test_esm.c`, 315 lines, covering both IRQ handlers' channel-decode logic plus the VIM-routing calls via FFF fakes), and both need `hal_vim.h`'s declarations (141 lines) to even compile, since `hal_esm_init()` calls two of its functions. `esm_types.h`'s 155-line channel table is TI-cross-checked data, not hand-composed logic. ## Checklist - [x] Commit messages follow `type(scope): description` convention with `Relates to #<issue>` footer - [x] PR template filled in completely - [x] No unverified external binaries introduced (see QMS-GITFLOW-001 Binary Security section) - [x] All commits leave the codebase in a compilable, passing-tests state (Commit Integrity Rule) ## Summary - `hal/mss/esm/hal_esm.c`/`.h`: ESM driver (init/VIM routing, IRQ enable/disable, priority IRQ handlers) - `hal/mss/esm/private/esm_types.h`: ESM channel enum, cross-checked against TI's `sys_common_xwr68xx_mss.h` — **found and fixed two genuine omissions**: channels 21 (`MCANB_RAM_FATAL_ERR`) and 33 (`MCANB_RAM_REPAIR_ERR`) were misclassified as unassigned gaps in the prior draft and are real assigned sources in TI's table - `hal/mss/vim/hal_vim.h`: VIM driver header (declarations only, no implementation yet) - `testing/mss/unit/hal_functionality/test_esm.c` (+ `CMakeLists.txt`): Catch2 functional test suite, using FFF fakes for the two VIM calls

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