feat: SPI (MibSPI host mode) driver implementation and host unit tests #83
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opendutchsolutions.public/hal_awr6843#83
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Description
Adds
hal/mss/spi_host/hal_spi_host.c/.h— the SPI driver: MibSPI classic (non-buffered, non-DMA) polling master-mode init (mode 0-3 CPOL/CPHA, prescale clamp), blocking byte-shift write/read viaSPIDAT1/SPIBUF, software chip-select viahal_gpio_write(), and the IRQ handler decodingSPIFLGto a weak, application-overridablehal_spi_host_irq_handler()hook. Depends on the already-landed GPIO driver (#75) for chip-select, but only via a FFF fake in the test suite — no realhal_gpio.clinked.Use Case / Rationale
As a firmware developer, I need a
hal_spi_host_*API for blocking SPI transfers with software-driven chip select, following the same driver pattern established by GPIO (#75), ESM (#77), UART (#79), and I2C (#81).User Stories
hal_spi_host_init()to configure mode/prescale from a target bus clock instead of hand-computingSPIFMT0myself.hal_spi_host_start_transaction()/hal_spi_host_end_transaction()to drive chip-select as a plain GPIO pin, decoupled from MibSPI's own hardware CS lines.testing/mss/unit/hal_functionality/test_spi_host.c) covering all four SPI modes, prescale clamping, and the GPIO chip-select calls (via FFF), runnable in CI without target hardware.Acceptance Criteria
hal/mss/spi_host/hal_spi_host.c/.himplemented against this project's currenthal/registers/component/spi.h/instance/spi.htesting/mss/unit/hal_functionality/test_spi_host.cpasses underctest, using an FFF fake forhal_gpio_write()Functional Impact
None — self-contained addition alongside the already-landed GPIO/ESM/UART/I2C drivers.
Regulatory Impact
None
QMS Impact
None
Risk Impact
No — existing risk coverage sufficient.
Related Issues / PRs
Relates to #4, relates to #75, relates to #77, relates to #79, relates to #81