feat: EPWM driver implementation and host unit tests #93

Closed
opened 2026-07-23 15:16:43 +00:00 by hoogv · 0 comments
Owner

Description

Adds hal/mss/epwm/hal_epwm.c/.h — the ePWM (Enhanced Pulse Width Modulator) driver: fixed-frequency, adjustable-duty-cycle waveform generation on the EPWMxA output pin. hal_epwm_init() searches the 8x8 HSPCLKDIV/CLKDIV prescale combination space for a working time-base period, configures Time-Base/Counter-Compare/Action-Qualifier submodules (immediate/non-shadowed mode), hal_epwm_set_duty_cycle() reprograms CMPA, and hal_epwm_start()/hal_epwm_stop() toggle the counter mode. All three ePWM instances supported (register-identical per TRM Section 21.4).

Deliberately minimal scope (documented in hal_epwm.h's top-of-file comment): EPWMxB output, Dead-Band, PWM-Chopper, Trip-Zone, Digital-Compare, Event-Trigger, and multi-module phase sync are all out of scope. Polling-only, no IRQ path — the TRM states the interrupt line is generated entirely by the Event-Trigger submodule, which this driver deliberately doesn't model.

Use Case / Rationale

As a firmware developer, I need a hal_epwm_* API for basic single-output PWM generation, following the same driver pattern established by GPIO, ESM, UART, I2C, SPI, ADCBUF, CBUFF, HWA, and DMM.

As a QMS reviewer, I need a host-native Catch2 test suite (testing/mss/unit/hal_functionality/test_epwm.c) covering the prescale-search math, duty-cycle programming, and start/stop sequencing across all three instances, runnable in CI without target hardware.

Acceptance Criteria

  • hal/mss/epwm/hal_epwm.c/.h implemented against this project's current hal/registers/component/epwm.h/instance/epwm.h
  • testing/mss/unit/hal_functionality/test_epwm.c passes under ctest
  • Sanity-checked by deliberately breaking a register field/formula and confirming the test suite catches it, then reverting

Functional Impact

None — self-contained addition alongside the already-landed GPIO/ESM/UART/I2C/SPI/ADCBUF/CBUFF/HWA/DMM drivers.

Regulatory Impact

None

QMS Impact

None

Risk Impact

No — existing risk coverage sufficient.

Relates to #4, relates to #75, relates to #77, relates to #79, relates to #81, relates to #83, relates to #85, relates to #87, relates to #89, relates to #91

### Description Adds `hal/mss/epwm/hal_epwm.c`/`.h` — the ePWM (Enhanced Pulse Width Modulator) driver: fixed-frequency, adjustable-duty-cycle waveform generation on the EPWMxA output pin. `hal_epwm_init()` searches the 8x8 HSPCLKDIV/CLKDIV prescale combination space for a working time-base period, configures Time-Base/Counter-Compare/Action-Qualifier submodules (immediate/non-shadowed mode), `hal_epwm_set_duty_cycle()` reprograms CMPA, and `hal_epwm_start()`/`hal_epwm_stop()` toggle the counter mode. All three ePWM instances supported (register-identical per TRM Section 21.4). Deliberately minimal scope (documented in `hal_epwm.h`'s top-of-file comment): EPWMxB output, Dead-Band, PWM-Chopper, Trip-Zone, Digital-Compare, Event-Trigger, and multi-module phase sync are all out of scope. Polling-only, no IRQ path — the TRM states the interrupt line is generated entirely by the Event-Trigger submodule, which this driver deliberately doesn't model. ### Use Case / Rationale As a firmware developer, I need a `hal_epwm_*` API for basic single-output PWM generation, following the same driver pattern established by GPIO, ESM, UART, I2C, SPI, ADCBUF, CBUFF, HWA, and DMM. As a QMS reviewer, I need a host-native Catch2 test suite (`testing/mss/unit/hal_functionality/test_epwm.c`) covering the prescale-search math, duty-cycle programming, and start/stop sequencing across all three instances, runnable in CI without target hardware. ### Acceptance Criteria - [ ] `hal/mss/epwm/hal_epwm.c`/`.h` implemented against this project's current `hal/registers/component/epwm.h`/`instance/epwm.h` - [ ] `testing/mss/unit/hal_functionality/test_epwm.c` passes under `ctest` - [ ] Sanity-checked by deliberately breaking a register field/formula and confirming the test suite catches it, then reverting ### Functional Impact None — self-contained addition alongside the already-landed GPIO/ESM/UART/I2C/SPI/ADCBUF/CBUFF/HWA/DMM drivers. ### Regulatory Impact None ### QMS Impact None ### Risk Impact No — existing risk coverage sufficient. ### Related Issues / PRs Relates to #4, relates to #75, relates to #77, relates to #79, relates to #81, relates to #83, relates to #85, relates to #87, relates to #89, relates to #91
hoogv closed this issue 2026-07-23 15:25:27 +00:00
hoogv self-assigned this 2026-07-23 19:11:01 +00:00
hoogv added this to the Development project 2026-07-23 19:11:03 +00:00
Sign in to join this conversation.
No project
No assignees
1 participant
Notifications
Due date
The due date is invalid or out of range. Please use the format "yyyy-mm-dd".

No due date set.

Dependencies

No dependencies set.

Reference
opendutchsolutions.public/hal_awr6843#93
No description provided.